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Last revised:
02/16/2000

Intel Pentium III Katmai/Coppermine Slot 1 for 440BX Performance Comparison
System Buses
page 1 of 3

A generic definition for a system bus is an interface between two points. For example, the PCI bus is an interface between the chipset and the PCI slot.

An analogy for the system bus in a computer and the real world is a freeway. Two things define a system bus: 1. bus speed and 2. the width of the bus in bits (i.e., 8 bit, 16 bit, 32 bit, etc). In terms of a freeway, the bus speed is the maximum speed limit, while the width of the bus is the number of lanes. And think of the data (a.k.a, "bits") you want to move as the cars on the freeway. If I want to move, for example, 10,000 bits (or cars) from point A to point B in the least amount of time, I'd have to move the cars very fast or increase the number of lanes, or do both.

Common sense will tells us, a system bus with high performance (or bandwidth) means it has a high bus speed and a large bus width. Again, translating this into our freeway analogy, if we can increase the maximum speed limit and number of lanes, then we have increased the productivity of the freeway. For the purpose of this article, we will on concentrate solely on the bus speed.

Figure 1: Front Side Bus Let us focus on the front side bus (FSB), which, with the newer Intel chipsets, is really a misnomer. Refer to figure 1 on the right. The FSB actually consists of two buses: 1. between the memory and the chipset and 2. between the chipset and the CPU itself. But Intel refers to both buses collectively as the front side bus. Why? Because with the early Celeron/Pentium II/III chipsets (such as the Intel 440BX or 440ZX), both buses ran at the same speed.

Figure 2 But technically speaking, there are two buses: 1. the memory bus and 2. the CPU/Host bus. Refer to figure 2 on the right.


Figure 3: Intel 440BX/ZX Chipset Let's look at the Intel 440ZX/BX chipset, as it relates to the system buses. Figure 3 on the right shows the bus speed for both the memory and CPU/host bus. This chipset only accepts SDRAM running at 66MHz or 100MHz (a.k.a, PC66 or PC100 DIMM). As mentioned above, Intel refers to both buses simply as the front side bus. This is due to the fact that the speed of the memory bus must match the speed of the CPU/host bus.

Figure 4: Intel 810 Chipset With the Intel 810 chipset, we can clearly see the difference between the memory and CPU/host bus. Figure 4 on the right shows the memory bus running at a constant 100MHz. This mean you must use PC100 DIMM with the 810 chipset. But notice the CPU/host bus is only 66MHz! The 810 is designed for the Intel Celeron processors, which runs at a 66MHz CPU/host bus. So for the first time, we have an Intel chipset that runs the buses at different speeds.

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